TSMC

News

Cadence Design Systems to Host Second Annual Silicon Valley Power Forward Low-Power Design Summit
S3 Joins Power Forward Initiative
Cadence Low-Power Solution Selected for Global Unichip’s PowerMagic Low-Power Design Methodology
UMC Adopts Cadence 40-Nanometer Reference Flow for Low Power, Verification, Implementation and DFM-Aware Design
Cadence Delivers 28-Nanometer Design Capabilities to TSMC Reference Flow 10.0

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Community

TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry industry's largest portfolio of process-proven library, IP, design tools and reference flows. The company operates two advanced twelve-inch wafer fabs, five eight-inch fabs and one six-inch wafer fab. TSMC also has substantial capacity commitments at its wholly owned subsidiaries, WaferTech and TSMC (Shanghai), and its joint venture fab, SSMC. TSMC is the first foundry to provide 65nm production capabilities. Its corporate headquarters are in Hsinchu, Taiwan. For more information visit www.tsmc.com.

Advisors

Dr. Fu-Chieh Hsu
Vice President, Design and Technology Platforms
TSMC

Dr. Fu-Chieh Hsu joined TSMC in April 2004 as Vice President of Design and Technology Platforms. In this capacity, he is responsible for all design service operations at TSMC, in collaboration with TSMC Marketing and R&D defining and providing design platforms.

Dr. Hsu previously founded Mosys and served as Chairman and CEO from 1991 until 2004. He was formerly Chairman and President of Myson Technology Inc. (now Myson Century Inc.) from 1990 to 1991 and prior to that served as Vice President and Chief Technical Officer at Integrated Device Technology Inc. Dr. Hsu also served at Hewlett-Packard Laboratories.

Dr. Hsu received his Bachelor of Science degree in electrical engineering from National Taiwan University and his MS and Ph.D. degrees in electrical engineering and computer sciences from University of California, Berkeley. He holds 55 U.S. patents.