Apache

News

Cadence Design Systems to Host Second Annual Silicon Valley Power Forward Low-Power Design Summit
S3 Joins Power Forward Initiative
Cadence Low-Power Solution Selected for Global Unichip’s PowerMagic Low-Power Design Methodology
UMC Adopts Cadence 40-Nanometer Reference Flow for Low Power, Verification, Implementation and DFM-Aware Design
Cadence Delivers 28-Nanometer Design Capabilities to TSMC Reference Flow 10.0

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Community

Apache is an industry leading provider of power and noise solutions for chip-package-system convergence from RTL to sign-off. Apache’s products address the unique power and noise challenges associated with specific design domains such as digital, analog/mixed-signal, package/PCB, and SiP, while providing an eco-platform that integrates the SoC, custom IP, and System worlds. From RTL power analysis and reduction, early stage prototyping and optimization, and through chip and package sign-off, Apache’s products address the critical power noise challenges and enable designers to reduce cost, mitigate risk, and improve time-to-market. For more information about Apache visit www.apache-da.com.

Advisors

Vic Kulkarni
General Manager and Senior Vice President of RTL Business Unit
Apache

Mr. Kulkarni joined Apache through the acquisition of Sequence Design, where he served as the President and CEO since 2002 and led the Company to a leadership position in RTL Design for Power (DFP)TM solutions. He set the Company's vision and delivered power, timing and signal integrity products for nanometer systems-on-chip design. Mr. Kulkarni is now responsible for leading Apache’s RTL Business Unit as Senior Vice President and General Manager. Mr. Kulkarni has over 32 years of experience in the EDA and semiconductor industries, including General Manager and Vice President of Avant!'s Silicon Business Unit, responsible for Silicon IP and Process Modeling tools. Prior to Avant!, Mr. Kulkarni held various engineering and marketing positions in Meta-Software, VLSI, National and Fairchild. Mr. Kulkarni holds an M.S. E.E. degree in Solid State Electronics from the University of Cincinnati and B.Tech (EE) from Indian Institute of Technology, Bombay.