Power Forward Initiative (PFI) Community

15. Low Power Design Guide - Sonics: CPF Flow for Highly-Configurable On-Chip Network IP


posted by Power Forward
09-15-2009

Downloads: 80
File size: 1.9MB
Views: 2,177
15. Low Power Design Guide - Sonics: CPF Flow for Highly-Configurable On-Chip Network IP
Filed under: ,

By Scott Evans, Director of Software at Sonics, Inc.

Systems designers are moving rapidly toward using intelligent interconnect solutions in order to manage on-chip communications in system-on-chip (SoC) devices. This movement is seen most notably among multimedia, high performance networking and mobile applications.

Sonics was among the first to identify the need for an interconnect solution to address high performance systems and over the years established itself as the leading provider of intelligent On-chip Network solutions. Throughout this chapter, you will be introduced to the Sonics On-chip Network solutions and how Sonics, working along with Cadence® Design Systems, Inc. provides customers with the products and Common Power Format (CPF)-based supporting environment to accelerate low power designs.