http://www.powerforward.org/media/g/2008_silicon_valley_summit/default.aspx<p>Hosted by Cadence on October 1, 2008, this Power Forward Initiative Low-Power Design Summit featured a day of presentations from PFI partner companies.&nbsp; You can view presentation videos and download the PDFs of all presentations</p> <p> <b>NOTE: These downloads are accessible to PFI site members only.</b> <a href="/login.aspx">Sign in</a> or <a href="/user/CreateUser.aspx">Join Now</a></p>enCommunityServer 2008.5 (Build: 30929.2835)http://www.powerforward.org/media/p/91.aspxThu, 01 Oct 2009 23:13:19 GMT2151c306-1704-4d62-833d-93f0cfd9f992:91Power Forward0<p>Presentation (PDF) and video.</p> <p>[View:http://www.stephenhessel.com/cadencepfi/introrough1.wmv:400:300]</p> <p>&nbsp;</p>http://www.powerforward.org/media/p/164.aspxWed, 09 Sep 2009 18:59:31 GMT2151c306-1704-4d62-833d-93f0cfd9f992:164Power Forward0<p>Moderator: Ron Wilson, EDN Executive Editor</p> <p>Panelists: John Goodenough, ARM; Walter Ng, Chartered Semiconductor; Steve Carlson, Cadence; Carl Guardino, Silicon Valley Leadership Group, Ron Burns, Wipro</p> <p>[View:http://www.stephenhessel.com/cadencepfi/panel2rough1.wmv:400:300]</p>http://www.powerforward.org/media/p/162.aspxWed, 09 Sep 2009 18:22:00 GMT2151c306-1704-4d62-833d-93f0cfd9f992:162Power Forward0<p>Clean and Green - Carl Guardino, Silicon Valley Leadership Group</p> <p>[View:http://www.stephenhessel.com/cadencepfi/svlgrough1.wmv:400:300]</p>http://www.powerforward.org/media/p/161.aspxWed, 09 Sep 2009 18:19:53 GMT2151c306-1704-4d62-833d-93f0cfd9f992:161Power Forward0<p>Micro-Architecture Power Tradeoffs at the Electronic System Level - Michael McNamara, Cadence (available by <a href="mailto:info@powerforward.org?subject=PFI%20LP%20Design%20Summit%20Presentation%20Download%20-%20Track%204%20Cadence&amp;body=I%20am%20interested%20in%20receiving%20a%20copy%20of%20the%20presentation:%0D%0AMicro-Architecture%20Power%20Tradeoffs%20at%20the%20Electronic%20System%20Level">email</a> request)</p>http://www.powerforward.org/media/p/160.aspxWed, 09 Sep 2009 18:17:45 GMT2151c306-1704-4d62-833d-93f0cfd9f992:160Power Forward0<p>Early Power Analysis with CPF - Will Ruby, Sequence Design</p> <p>[View:http://www.stephenhessel.com/cadencepfi/sequencerough1.wmv:400:300]</p>http://www.powerforward.org/media/p/159.aspxWed, 09 Sep 2009 18:14:55 GMT2151c306-1704-4d62-833d-93f0cfd9f992:159Power Forward0<p>Sequential Optimizations for Low Power - Anmol Mathur, Calypto</p> <p>[View:http://www.stephenhessel.com/cadencepfi/calyptorough1.wmv:400:300]</p>http://www.powerforward.org/media/p/158.aspxWed, 09 Sep 2009 18:12:03 GMT2151c306-1704-4d62-833d-93f0cfd9f992:158Power Forward0<p>Architectural Trade-off Analysis - Thad McCracken, Chip Planning Solutions (available by <a href="mailto:info@powerforward.org?subject=PFI%20LP%20Design%20Summit%20Presentation%20Download%20-%20Track%204%20Chip%20Planning%20Solution&amp;body=I%20am%20interested%20in%20receiving%20a%20copy%20of%20the%20presentation:%0D%0AArchitectural%20SOC%20Prototyping">email</a> request)</p>http://www.powerforward.org/media/p/157.aspxWed, 09 Sep 2009 18:08:33 GMT2151c306-1704-4d62-833d-93f0cfd9f992:157Power Forward0<p>Pre-Design ASIC Power Estimates - Bob Eisenstadt, Alchip Technologies</p> <p>[View:http://www.stephenhessel.com/cadencepfi/alchiprough1.wmv:400:300]</p>http://www.powerforward.org/media/p/156.aspxWed, 09 Sep 2009 18:00:06 GMT2151c306-1704-4d62-833d-93f0cfd9f992:156Power Forward0<p>Cadence 45nm Common Platform Reference Flow - Gary Cheung, Chartered Semiconductor</p> <p>[View:http://www.stephenhessel.com/cadencepfi/charteredrough1.wmv:400:300]</p>http://www.powerforward.org/media/p/155.aspxWed, 09 Sep 2009 17:56:28 GMT2151c306-1704-4d62-833d-93f0cfd9f992:155Power Forward0<p>Faraday: A Low-Power Platform-based SoC - Albert Chen, Faraday Technology Corporation</p> <p>[View:http://www.stephenhessel.com/cadencepfi/faradayrough1.wmv:400:300]</p>http://www.powerforward.org/media/p/154.aspxWed, 09 Sep 2009 17:38:57 GMT2151c306-1704-4d62-833d-93f0cfd9f992:154Power Forward0<p>Ultra Low-Power Implementation using CPF - Anis Jarrar, Freescale Semiconductor</p> <p>[View:http://www.stephenhessel.com/cadencepfi/freescalerough1.wmv:400:300]</p>http://www.powerforward.org/media/p/152.aspxWed, 09 Sep 2009 17:27:12 GMT2151c306-1704-4d62-833d-93f0cfd9f992:152Power Forward0<p>Moderator: Susan Runowicz-Smith, Cadence</p> <p>Panelists: Ameesh Desai, LSI; Anis Jarrar, Freescale Semiconductor;</p> <p>Herve Menager, NXP; Brani Buric, Virage Logic</p> <p>[View:http://www.stephenhessel.com/cadencepfi/panel1rough1.wmv:400:300]</p>http://www.powerforward.org/media/p/151.aspxWed, 09 Sep 2009 17:22:35 GMT2151c306-1704-4d62-833d-93f0cfd9f992:151Power Forward0<p>Minimizing Design Complexity with Power Optimized Physical IP - Ken Brock, Virage Logic </p> <p>[View:http://www.stephenhessel.com/cadencepfi/viragerough1.wmv:400:300]</p>http://www.powerforward.org/media/p/150.aspxWed, 09 Sep 2009 17:19:19 GMT2151c306-1704-4d62-833d-93f0cfd9f992:150Power Forward0<p>CPF Flow for Highly-configurable Interconnect IP - Scott Evans, Sonics, Inc.</p> <p>[View:http://www.stephenhessel.com/cadencepfi/sonicsrough1.wmv:400:300]</p>http://www.powerforward.org/media/p/149.aspxWed, 09 Sep 2009 17:03:41 GMT2151c306-1704-4d62-833d-93f0cfd9f992:149Power Forward0<p>ARM Power Management Kit and iRM - Wolfgang Helfricht, ARM Inc.</p>