2008 Silicon Valley Summit
Hosted by Cadence on October 1, 2008, this Power Forward Initiative Low-Power Design Summit featured a day of presentations from PFI partner companies. You can view presentation videos and download the PDFs of all presentations
NOTE: These downloads are accessible to PFI site members only. Sign in or Join Now
|
01. Introduction - Pankaj Mayor, Cadence
Presentation (PDF) and video.
|
10/01/2009
|
23
|
0
|
|
|
02. Keynote - NVIDIA
nPowering Change - Chris Malachowsky,
|
07/22/2009
|
15
|
0
|
|
|
03. Track 1 Low-Power Design in Action - AMD
Power-Gating on a High Performance GPU - Jeffrey Yang, AMD
|
09/09/2009
|
22
|
0
|
|
|
04. Track 1 Low-Power Design in Action - TSMC
Low-Power Design Considerations - David Lan, TSMC
|
09/09/2009
|
25
|
0
|
|
05. Track 1 Low-Power Design in Action - Cadence, ARM, UMC
ARM1176-JZFS CPU Based Low-Power Subsystem; Methodology to Reduce Electrical and Functional Failure...
|
09/09/2009
|
18
|
0
|
|
|
06. Track 1 Low-Power Design in Action - Cadence
Advanced Low-Power Design - Tobing Soebroto, Cadence
|
09/09/2009
|
19
|
0
|
|
|
07. Track 2 Power Optimized IP - ARC
Power-efficient Sound Solutions from ARC - Akash Despande, ARC International
|
09/09/2009
|
10
|
0
|
|
|
08. Track 2 Power Optimized IP - ARM
ARM Power Management Kit and iRM - Wolfgang Helfricht, ARM Inc.
|
09/09/2009
|
19
|
0
|
|
|
09. Track 2 Power Optimzed IP - Sonics
CPF Flow for Highly-configurable Interconnect IP - Scott Evans, Sonics, Inc.
|
09/09/2009
|
10
|
0
|
|
|
10. Track 2 Power Optimized IP - Virage
Minimizing Design Complexity with Power Optimized Physical IP - Ken Brock, Virage Logic
|
09/09/2009
|
14
|
0
|