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07a. Track 1: Design and Verification - Calypto Video
Sequential Optimizations for Low Power Design – Anmol Mathur, CTO and co-founder, Calypto
|
01/15/2010
|
11
|
0
|
|
|
06. Opening Session: Industry Insight Panel Video
Industry Insight Panel: The Low-Power Evolution - Challenges and Opportunities Moderator: Richard...
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01/15/2010
|
9
|
0
|
|
|
05a. Opening Session - Cadence Design Systems Video
Cadence Low-Power Solution: Spec to GDSII – Kumar Subramani, Architect, Cadence Design Systems
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01/15/2010
|
14
|
0
|
|
04. Opening Session - Cadence, ARM, UMC
Ulterior UMCL65SP ARM1176JZFSTM Low Power Results and Analysis – Sachin Idgunji, ARM; Please...
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01/15/2010
|
35
|
0
|
|
|
03a. Opening Session – Si2 Video
Toward Interoperable Power Formats – Qi Wang, Vice Chair, TSG/LPG, Si2
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01/15/2010
|
6
|
0
|
|
|
02a. Opening Session - Global Unichip Video
GUC Low Power Design Platform - Albert Li, Global Unichip
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01/15/2010
|
13
|
0
|
|
|
01a. Welcome Address Video– Cadence Design Systems
Welcome Address – John Bruggeman, Senior Vice President and Chief Marketing Officer, Cadence...
|
01/15/2010
|
30
|
0
|
|
01. Welcome Address – Cadence Design Systems
Welcome Address – John Bruggeman, Senior Vice President and Chief Marketing Officer, Cadence...
|
01/13/2010
|
20
|
0
|
|
|
09. Track 1: Design and Verification - Cadence Design Systems
High Level Synthesis Using C-to-Silicon Compiler: A Case Study of Control-Dominated Design –...
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01/13/2010
|
18
|
0
|
|
|
05. Opening Session - Cadence Design Systems
Cadence Low-Power Solution: Spec to GDSII – Kumar Subramani, Architect, Cadence Design Systems
|
01/13/2010
|
26
|
0
|