"Over the past 2^½ years since the PFI was launched, membership has grown from 10 to 36 companies," explained Pankaj Mayor, Business Development Group Director at Cadence. "The PFI’s focus has shifted from developing CPF to the practical use of low-power design solutions and ecosystem building. This resonated well with attendees—85 percent of whom are already engaged in low-power design or will be within the next 6 months."

Mayor opened the day-long conference and announced that LSI Corporation, Chartered Semiconductor, and SIS Taiwan have joined the Power Forward Initiative. He attributed the boom in low-power design adoption to the massive growth in global energy consumption due to electronics, especially Internet applications such as online gaming and search engines.

NVIDIA saves power
The morning keynote by Chris Malachowsky, an NVIDIA founder, set the stage for further discussions on low power. "When you begin your design you have to ask yourself what is the lowest power you can operate at for the job you're trying to do? You have to take a holistic view of your design."

Malachowsky said NVIDIA has three ways of looking at low-power designs: One is when building something for the absolute lowest power in portable devices, two is performance that is dictated in a PC chassis, and three is designing at the highest end to get the highest performance in a power budget.

Many power saving methods have also been applied to their flagship video processors, Malachowsky said. "We have aggressive clock gating, aggressive enabling and disabling, like active termination, clock frequency, power VDV levels, etc. We have seen a 2-3x improvements in our performance per watt."

Technical Sessions
PFI member companies AMD, ARM/UMC, Faraday, and Freescale highlighted examples of successful low-power design projects ranging from power-efficient GPU design to ARM CPU methodologies to automotive low-power design considerations. David Lan of TSMC, a founding member of PFI, highlighted how industry collaboration to integrate process technology advancements with new design techniques is critical to producing energy-efficient chips and delivering real value to mutual customers.

The collaboration message was echoed by other PFI members, who highlighted the broad support by IP companies in the ecosystem for CPF-based low-power design methodologies. Presentations by ARM, ARC, Chartered Semiconductor, Virage Logic, and Sonics reviewed products and methodologies available today that build power-efficient chips.

The hot topic for many at the summit was architectural low-power tradeoff techniques. A standing-room-only crowd enjoyed presentations from Cadence featuring low-power chip planning and how quickly C-to-Silicon Compiler helped Broadcom analyze various architectures to optimize tradeoffs among power and performance criteria. Calypto presented novel techniques for architectural optimization, and Sequence discussed RTL power prototyping.

Deployment Challenges
PFI Coordinator Susan Runowicz-Smith moderated a panel discussing the challenges to mainstream low-power design adoption. Seasoned low-power experts from NXP, Freescale, LSI, and Virage Logic populated the panel. The most telling of all attendee comments after the presentation was: "Low-power design complicates design flows, but the payoff is big.”

Going Green
Wrapping up the day, Carl Guardino, CEO of the Silicon Valley Leadership Group, stressed that "going green" is not just going to save the planet, but is in the best interest of companies in Silicon Valley, which can become the epicenter for burgeoning green industries. He noted that data centers, power-use hubs for the Internet, will continue to consume more power unless the semiconductor industry comes together to find solutions. "By 2011, at current growth rates, they will consume enough power to require ten new power plants in the U.S. alone."

A panel led by Ron Wilson, EDN Executive Editor, expanded on the practical side of the low-power design equation to include techniques people are using to save power at home.

"The meeting exceeded expectations–in terms of presentations and attendance," concluded Pankaj Mayor. "Energy efficiency is an important global initiative and Cadence is playing a leading role in enabling green electronics."