Si2 to Facilitate StandardizationSAN JOSE, Calif., 05 Oct 2006
Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global
electronic-design innovation, and Silicon Integration Initiative (Si2),
a worldwide consortium of industry-leading companies in the
semiconductor, electronic systems and EDA tool industries, announced
today that they have reached agreement for Si2 to facilitate
standardization of the Common Power Format (CPF) through the IEEE. Si2
agrees to join the IEEE-SA as a corporate member and, once the CPF
Working Group (WG) has been approved by the IEEE, Si2 has agreed to be
available, at the request of the WG, to serve as secretary of the IEEE
CPF WG to enable closer synchronization with Si2's recently announced
Low-Power Coalition (LPC).
As part of this agreement, CPF will be made available to LPC members
for their review. CPF has been developed with significant input from a
broad cross-section of industry leaders in the Power Forward Initiative.
LPC members will receive access to CPF by October 31, 2006. Membership
in the LPC is open to all Si2 members, which currently includes 108
companies.
"CPF has excellent potential to serve a foundation
role in low-power design flows," said Steve Schulz, president and CEO
of Si2. "We have listened to industry on the importance of open and
unified standards-based flows, so we are pleased to contribute by
aligning the CPF standardization efforts through inclusion of LPC
members by taking an active role in approved IEEE standardization
processes."
"Cadence has had many positive experiences with
Si2 in building user coalitions and driving market adoption," said Jan
Willis, senior vice president, Industry Alliances at Cadence. "We are
delighted to support Si2 through the Low-Power Coalition to facilitate
industry-wide market development of the Common Power Format."
More details about this agreement will be presented by Si2 at the Low
Power Workshop hosted by Si2 and Accellera on October 5 in San Jose.
This workshop is an open forum for technical leadership of end-user
companies to identify critical needs in the area of low power design,
verification, and analysis of integrated circuits.
About CPF
CPF is a new design language that addresses the limitation in the
design automation tool flow by capturing the designer's intent for
power management and enabling the automation of advanced power-lowering
design techniques. The Common Power Format enables all design,
verification, implementation—and technology-related power objectives to
be captured in a single file and allows the application of that data
across the design flow, providing a consistent reference point for
design development and production.
About Si2
Si2 is an organization of industry-leading semiconductor, systems, EDA
and manufacturing companies focused on improving the way integrated
circuits are designed and manufactured in order to speed time-to
market, reduce costs, and meet the challenges of sub-micron design. Si2
is uniquely positioned to enable collaboration through a strong
implementation focus driven by its member companies. Si2 focuses on
developing practical technology solutions to industry challenges. Si2
represents over 100 companies involved in all parts of the silicon
supply chain throughout the world.
About Cadence
Cadence enables global electronic-design innovation and plays an
essential role in the creation of today's integrated circuits and
electronics. Customers use Cadence software and hardware,
methodologies, and services to design and verify advanced
semiconductors, consumer electronics, networking and telecommunications
equipment, and computer systems. Cadence reported 2005 revenues of
approximately $1.3 billion, and has approximately 5,100 employees. The
company is headquartered in San Jose, Calif., with sales offices,
design centers, and research facilities around the world to serve the
global electronics industry. More information about the company, its
products, and services is available at
www.cadence.com.
For more information, please contact:
William Bayer
direct:512.342.2244 Ext. 304
bayer@si2.orgSilicon Integration Initiative
Michael Fournell
direct:408.428.5135
fournell@cadence.comCadence Design Systems, Inc.
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