VP of Engineering
Sean Foley joined Powervation in September 2008 as vice president of engineering.
Prior to Powervation, Dr. Foley spent nine years at Cypress Semiconductor. For the last four years he served as design engineering director managing a 20-person mixed-signal design team in Cork, Ireland. Before then, he spent five years as a design engineer, culminating in a technical leadership role as a principal design engineer. Under his leadership, the Cork design center developed several successful, mixed-signal products for Cypress. The team also developed analog IP for Cypress' various product families, earning the title of center of excellence for phase locked loop (PLL) design in the process.
Before Cypress, Dr. Foley spent six years as a research scientist at the National Microelectronics Research Center (NMRC) in Cork (now known as Tyndall National Institute). His research was focused on the failure mechanisms of MOS and BJT devices, and on IC interconnect reliability. He managed a reliability characterization lab that contracted directly to several large European IC manufactures. He also participated in several EU-funded projects in his chosen research area.
Dr. Foley earned his BE degree in 1991 and his Ph.D. in 2000, both from University College Cork. He holds three U.S. patents with two more pending, and has authored over 25 journal and conference publications.